Energy saving rectifier

The first part of the project has focused on the different approaches that can be taken to provide the necessary ac/dc conversion for compliance with the regulations. For a majority of the research in ac/dc conversion, the focus has been on integrating the PFC-unit into the existing dc/dc converter and one of the tasks in this project has been to analyze the effects on the conversion efficiency by doing this. The two major groups of alternative PFC solutions have been recognized as the Reduced Power Processing approach and the Single-Stage approach. In order to investigate the performance of the different approaches, the basic converter topologies, both isolated and nor-isolated, have been analyzed in terms of component stress. Several important observations were made in this process. The two most important observations with direct influence on how the different PFC approaches perform are Listed below: 1) Non-isolated buck and boost type converters are low component stress converters compared to the buck-boost type converters. 2) Isolated buck and boost converters have increased semiconductor component stress, and exhibits a dramatically increase in these stresses when exposed to input voltage variations. In the Reduced Power Processing approach a typically way of evaluating the performance of this approach, is to calculate the amount of power processing. In this evaluation the Two-Stage approach is used as the worst case approach with its two-times of power processing, calculated as one time for the PFC pre-converter, and one time for the isolated dc/dc converter. It has been shown that the amount of power processed is a very poor indicator of how efficient the conversion is performed and in all practical cases, the Reduced Power Processing approaches expose the components to a higher stress compared to the Two-Stage approach. The reason for this is that the Reduced Power Processing approach has to make use of high component stress converters (buck-boost derived) and/or isolated converters in high stress configurations. The basic conclusion is: It is not how much, but in what way the power is processed, that is the determining factor on the components stresses and thereby the efficiency. The Single-Stage approach is comprised of an isolated dc/dc converter with means to shape the input current so that compliance with the regulations is possible. The output voltage is regulated with a fast control loop, and the Single-Stage approach does not rely on a separate control system to regulate the input current. In order to decouple the pulsating input power, a large bulk capacitor serves as the energy storage. Since there is only one control system regulating the output voltage, the storage capacitor voltage is not directly regulated. This voltage depends on the input/output power balance, and will typically vary proportional to the line voltage. This means, that for a 3:1 ac input-voltage range, the input to the isolated dc/dc converter will also be exposed to a 3:1 voltage range. Therefore the Achilles heal of the SingleStage approach, is the isolated dc/dc converter-part. The varying input voltage will expose the power semiconductors to excessive stress resulting in the TwoStage approach to be more efficient. For the best Single-Stage configurations, the approach becomes competitive with the Two-Stage approach when the input voltage range is reduced to about 1.3:1. This means that for very narrow voltage range applications, the best of the Single-Stage approaches might be a reasonable solution. For wide input applications, the Two-Stage approach, using a boost PFC, is the superior approach compared to the Reduced Power Processing approach and the Single-Stage approach. Even though the boost converter is a low component stress converter, the voltage variation is still the limiting factor on the efficiency. Since the boost converter is only able to produce an output voltage larger than the maximum line peak voltage, the worst case situation for the converter is at low line, where the step-up ratio is maximized. Other PFC pre converters exists that are capable of producing an output voltage below the maximum line peak voltage. The SEPIC converter is capable of this, but because the converter is a buck-boost derived converter, the component stresses are high with reduced efficiency as a consequence. Besides the power output voltage, the SEPIC is also capable of controlling the inrush current, wtch is something that the boost converter is unable to do, unless extra circuitry is provided. A PFC circuit not using a bridge rectifier has been invented. This and a several variations have been patented. A 500W 180V output prototype of this circuit has shown promising efficiencies. Switch-able topologies like the two-switch buck-boost is a better approach compared to the SEPIC. This converter is able to change the topology from being a boost type to a buck type according to the instantaneous value of the line voltage. If the line voltage is below the output voltage the converter works in the boost mode and in the buck mode if the line voltage is above the output voltage. The most significant drawbacks of this approach is, that the all the input power has to flow through the buck switch, and that in the buck mode, the input current becomes highly discontinuous, increasing the EMI filtering requirements. All of the above investigations, considerations and observations, have lead to the construction and invention of a new type of PFC converter that addresses the problems with the boost converter but retain its efficient conversion properties. This new converter has been named Efficient Wide Range Converter (EWiRaC) and possesses the foliowing features: 1) High efficiency. 2) Output voltage below the line peak voltage. 3) Continuous input current (low EMI-filter requirements). 4) Inrush-current limiting. Several versions of the EWiRaC have been presented, all which are based on an approach called the series voltage-source approach. The EWiRaC is currently being patented. This approach makes it possible to effectively reduce the input voltage range with a factor of two. The EWiRaC has been compared with both the two-switch buck-boost and the standard boost converter. The results of this comparison showed, that the EWiRaC potentially would be able to achieve higher efficiency compared to both the two-switch buck-boost, and the standard boost converter. To verify the performance of the EWiRaC, two prototypes have been presented using different control schemes. The EWiRaC was desi gned for the universal line range with an output voltage of 185VDC capable of 500W output power. The efficiency reached with this prototype was 94,8% and for the full line range, the worst case efciency was in the range of 94,8%-97%. For a boost PFC converter using the same power components, the efficiency will be at least 1-2 percentage points lower, which translates into a reduction of the power losses of 15%-30% by using the EWiRaC